Power consumption is a primary concern in many modern electrical circuits. A primary goal with many circuits is to make them as small as possible. Power consumption may limit the extent to which a circuit may be reduced in size. Another primary goal with many electrical circuits is to make circuits that can run longer with a limited supply of power, such as in portable products like cellular phones and portable computers. Power consumption limits the amount of time a portable device may operate with a limited supply of power. Therefore, there is a strong need in the art for methods and apparatus that reduce the amount of power consumed in electrical circuitry.
Engineers have developed various solutions to simplify digital signal processing circuitry. Such solutions often result in circuits with fewer devices, which often corresponds with lower power consumption. For example, engineers utilize Booth Coding in mathematical circuitry to reduce the number of mathematical operations that such circuitry must perform to get the desired result. Such coding provides for digital signal processing circuits that are smaller, faster, and generally lower power.
A problem with many, if not all, of such digital signal processing circuits is that the circuits perform unnecessary switching. Switching in digital circuitry is a primary source of power loss. Accordingly, an improvement in digital signal processing technology that reduces the amount of unnecessary switching will generally result in lower power consumption and all of the benefits that correspond to such lower power consumption. See, for example, “Low Power Multiplication for FIR Filters,” by Chris J. Nicol and Patrick Larsson, ACM 0-89791-903-3/97/08. In their article, Nicol and Larsson offer a technique to reduce the switching activity in a multiplier by connecting the relatively stable coefficients of a filter response to the Booth encoded input of a multiplier rather than connecting other more random inputs.
Since, as discussed previously, there exists a strong need in the art for methods and apparatus that reduce the amount of power consumed in electrical circuitry, and there is often a correlation between the amount of switching required in circuitry and the amount of power consumed in such circuitry, there exists a strong need in the art for methods and apparatus that reduce the amount of switching in digital signal processing technology. Further, unnecessary switching not only results in unnecessary power consumption, but also results in unnecessary device wear and reduced life, thereby providing further incentive to develop methods and apparatus that reduce the amount of unnecessary switching in digital signal processing circuitry.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.